2700 search results - page 74 / 540 » Processor Architectures for Ontogenesis |
124
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FCCM
2004
IEEE
15 years 7 months ago
2004
IEEE
We present a prototype design of the MOLEN polymorphic processor, a CCM based on the co-processor architectural paradigm. The Xilinx Virtex II Pro technology is used as a prototyp...
122
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ICPP
1991
IEEE
15 years 7 months ago
1991
IEEE
This paper presents an architecture for programmable systolic arrays that provides simple and e cient systolic communication. The Brown Systolic Array is a linear implementation o...
151
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FPGA
2000
ACM
15 years 7 months ago
2000
ACM
This paper describes a C compiler for a mixed Processor/FPGA architecture where the FPGA is a Reconfigurable Functional Unit (RFU). It presents three compilation techniques that c...
161
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CASES
2005
ACM
15 years 6 months ago
2005
ACM
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
136
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
The performance of SIMD processors is often limited by the time it takes to transfer data between the centralized control unit and the parallel processor array. This is especially...