Sciweavers

2700 search results - page 84 / 540
» Processor Architectures for Ontogenesis
Sort
View
TC
2008
15 years 4 months ago
Elliptic-Curve-Based Security Processor for RFID
RFID (Radio Frequency IDentification) tags need to include security functions, yet at the same time their resources are extremely limited. Moreover, to provide privacy, authenticat...
Yong Ki Lee, Kazuo Sakiyama, Lejla Batina, Ingrid ...
APSCC
2010
IEEE
15 years 2 months ago
A Multicore-Aware Runtime Architecture for Scalable Service Composition
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
Daniele Bonetta, Achille Peternier, Cesare Pautass...
SIGOPS
2011
215views Hardware» more  SIGOPS 2011»
14 years 11 months ago
Log-based architectures: using multicore to help software behave correctly
While application performance and power-efficiency are both important, application correctness is even more important. In other words, if the application is misbehaving, it is li...
Shimin Chen, Phillip B. Gibbons, Michael Kozuch, T...
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
13 years 6 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
15 years 10 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...