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IASTEDSEA
2004
14 years 8 days ago
Higher-order strategic programming: A road to software assurance
Program transformation through the repeated application of simple rewrite rules is conducive to formal verification. In practice, program transformation oftentimes requires data t...
Victor L. Winter, Steve Roach, Fares Fraij
HPCA
2003
IEEE
14 years 11 months ago
Caches and Hash Trees for Efficient Memory Integrity
We study the hardware cost of implementing hash-tree based verification of untrusted external memory by a high performance processor. This verification could enable applications s...
Blaise Gassend, G. Edward Suh, Dwaine E. Clarke, M...
POPL
2005
ACM
14 years 11 months ago
Automated soundness proofs for dataflow analyses and transformations via local rules
We present Rhodium, a new language for writing compiler optimizations that can be automatically proved sound. Unlike our previous work on Cobalt, Rhodium expresses optimizations u...
Sorin Lerner, Todd D. Millstein, Erika Rice, Craig...
EURODAC
1994
IEEE
209views VHDL» more  EURODAC 1994»
14 years 3 months ago
MOS VLSI circuit simulation by hardware accelerator using semi-natural models
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...
Victor V. Denisenko
CF
2007
ACM
14 years 2 months ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee