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    SIGSOFT
    2005
    ACM
    124views Software Engineering» more  SIGSOFT 2005»
    Matching execution histories of program versions
    14 years 8 months ago
    Matching execution histories of program versions
    Download  www.cs.purdue.edu
    We develop a method for matching dynamic histories of program executions of two program versions. The matches produced can be useful in many applications including software piracy...
    Xiangyu Zhang, Rajiv Gupta
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    ASPLOS
    2009
    ACM
    147views Programming Languages» more  ASPLOS 2009»
    DMP: deterministic shared memory multiprocessing
    14 years 8 months ago
    DMP: deterministic shared memory multiprocessing
    Download  www.cs.washington.edu
    Current shared memory multicore and multiprocessor systems are nondeterministic. Each time these systems execute a multithreaded application, even if supplied with the same input,...
    Joseph Devietti, Brandon Lucia, Luis Ceze, Mark Os...
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    ASPLOS
    2009
    ACM
    233views Programming Languages» more  ASPLOS 2009»
    StreamRay: a stream filtering architecture for coherent ray tracing
    14 years 8 months ago
    StreamRay: a stream filtering architecture for coherent ray tracing
    Download  www2.gcc.edu
    The wide availability of commodity graphics processors has made real-time graphics an intrinsic component of the human/computer interface. These graphics cores accelerate the z-bu...
    Karthik Ramani, Christiaan P. Gribble, Al Davis
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    PPOPP
    2009
    ACM
    169views Distributed and Parallel Com...» more  PPOPP 2009»
    An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
    14 years 8 months ago
    An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
    Download  www.cc.gatech.edu
    Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
    Seunghwa Kang, David A. Bader
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    HPCA
    2009
    IEEE
    175views Distributed And Parallel Com...» more  HPCA 2009»
    Dacota: Post-silicon validation of the memory subsystem in multi-core designs
    14 years 8 months ago
    Dacota: Post-silicon validation of the memory subsystem in multi-core designs
    Download  www.eecs.umich.edu
    The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
    Andrew DeOrio, Ilya Wagner, Valeria Bertacco
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