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PVM
2009
Springer
14 years 3 months ago
MPI on a Million Processors
Petascale machines with close to a million processors will soon be available. Although MPI is the dominant programming model today, some researchers and users wonder (and perhaps e...
Pavan Balaji, Darius Buntinas, David Goodell, Will...
RTAS
2008
IEEE
14 years 3 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
HIPEAC
2005
Springer
14 years 2 months ago
Enhancing Network Processor Simulation Speed with Statistical Input Sampling
Abstract. While cycle-accurate simulation tools have been widely used in modeling high-performance processors, such an approach can be hindered by the increasing complexity of the ...
Jia Yu, Jun Yang 0002, Shaojie Chen, Yan Luo, Laxm...
WMPI
2004
ACM
14 years 2 months ago
SCIMA-SMP: on-chip memory processor architecture for SMP
Abstract. In this paper, we propose a processor architecture with programmable on-chip memory for a high-performance SMP (symmetric multi-processor) node named SCIMA-SMP (Software ...
Chikafumi Takahashi, Masaaki Kondo, Taisuke Boku, ...
LCPC
2004
Springer
14 years 2 months ago
Speculative Subword Register Allocation in Embedded Processors
Abstract. Multimedia and network processing applications make extensive use of subword data. Since registers are capable of holding a full data word, when a subword variable is ass...
Bengu Li, Youtao Zhang, Rajiv Gupta