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SIGSOFT
2007
ACM
14 years 11 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
PADL
2004
Springer
14 years 3 months ago
Symbolic Execution of Behavioral Requirements
Message Sequence Charts (MSC) have traditionally been used as a weak form of behavioral requirements in software design; they denote scenarios which may happen. Live Sequence Chart...
Tao Wang, Abhik Roychoudhury, Roland H. C. Yap, S....
SC
1995
ACM
14 years 1 months ago
Communication Optimizations for Parallel Computing Using Data Access Information
Given the large communication overheads characteristic of modern parallel machines, optimizations that eliminate, hide or parallelize communication may improve the performance of ...
Martin C. Rinard
LCTRTS
2010
Springer
13 years 8 months ago
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
Chip multiprocessors (CMPs) are expected to be the building blocks for future computer systems. While architecting these emerging CMPs is a challenging problem on its own, program...
Ozcan Ozturk, Mahmut T. Kandemir, Mary Jane Irwin,...
WWW
2010
ACM
14 years 5 months ago
Dynamic and graphical web page breakpoints
Breakpoints are perhaps the quintessential feature of a debugger: they allow a developer to stop time and study the program state. Breakpoints are typically specified by selectin...
John J. Barton, Jan Odvarko