Abstract In this paper we describe a hands-on laboratory oriented instructional package that we have developed for data communications and networking. The package consists of a sof...
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
Due to the growing interest in mobile wireless Ad-Hoc networks’ (MANETs) applications, researchers have proposed many routing protocols that differ in their objective. Energy ef...
Wasim El-Hajj, Dionysios Kountanis, Ala I. Al-Fuqa...
For a while it seemed possible to pretend that all interaction between an algorithm and its environment occurs inter-step, but not anymore. Andreas Blass, Benjamin Rossman and the ...