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CORR
1998
Springer
110views Education» more  CORR 1998»
13 years 8 months ago
laboratories for Data Communications and Computer Networks
Abstract In this paper we describe a hands-on laboratory oriented instructional package that we have developed for data communications and networking. The package consists of a sof...
Rohit Goyal, Steve Lai, Raj Jain, Arjan Durresi
HPCA
2011
IEEE
13 years 4 days ago
MOPED: Orchestrating interprocess message data on CMPs
Future CMPs will combine many simple cores with deep cache hierarchies. With more cores, cache resources per core are fewer, and must be shared carefully to avoid poor utilization...
Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Su...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
14 years 3 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
IWCMC
2006
ACM
14 years 2 months ago
Optimal hierarchical energy efficient design for MANETs
Due to the growing interest in mobile wireless Ad-Hoc networks’ (MANETs) applications, researchers have proposed many routing protocols that differ in their objective. Energy ef...
Wasim El-Hajj, Dionysios Kountanis, Ala I. Al-Fuqa...
ASM
2004
ASM
14 years 2 months ago
Intra-step Interaction
For a while it seemed possible to pretend that all interaction between an algorithm and its environment occurs inter-step, but not anymore. Andreas Blass, Benjamin Rossman and the ...
Yuri Gurevich