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ERSA
2009
107views Hardware» more  ERSA 2009»
13 years 7 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...
IEEEPACT
1999
IEEE
14 years 2 months ago
Localizing Non-Affine Array References
Existing techniques can enhance the locality of arrays indexed by affine functions of induction variables. This paper presents a technique to localize non-affine array references,...
Nicholas Mitchell, Larry Carter, Jeanne Ferrante
IEEEPACT
2009
IEEE
14 years 4 months ago
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors
—With increasing numbers of cores, future CMPs (Chip Multi-Processors) are likely to have a tiled architecture with a portion of shared L2 cache on each tile and a bankinterleave...
Qingda Lu, Christophe Alias, Uday Bondhugula, Thom...
SODA
2012
ACM
212views Algorithms» more  SODA 2012»
12 years 7 days ago
Parallelism and time in hierarchical self-assembly
We study the role that parallelism plays in time complexariants of Winfree’s abstract Tile Assembly Model (aTAM), a model of molecular algorithmic self-assembly. In the “hiera...
Ho-Lin Chen, David Doty
EUROPAR
2000
Springer
14 years 1 months ago
Ahnentafel Indexing into Morton-Ordered Arrays, or Matrix Locality for Free
Abstract. Definitions for the uniform representation of d-dimensional matrices serially in Morton-order (or Z-order) support both their use with cartesian indices, and their divide...
David S. Wise