558 search results - page 27 / 112 » Programming the FlexRAM parallel intelligent memory system |
111
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SPAA
2009
ACM
16 years 3 months ago
2009
ACM
In order to be efficient with selfish programmers, a multicore transactional memory (TM) system must be designed such that it is compatible with good programming incentives (GPI),...
115
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IPPS
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper presents a helper thread prefetching scheme that is designed to work on loosely-coupled processors, such as in a standard chip multi-processor (CMP) system and in an in...
126
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HPCA
2006
IEEE
16 years 2 months ago
2006
IEEE
An important means of validating the design of commercial-grade shared memory multiprocessors is to run a large number of pseudo-random test programs on them. However, when intent...
134
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SPDP
1993
IEEE
15 years 6 months ago
1993
IEEE
This paper examines how the performance of a shared-memory multiprocessor can be improved by including hardware support for block transfers. A system similar to the Hector multipr...
100
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PLDI
2012
ACM
13 years 5 months ago
2012
ACM
This paper addresses the problem of reducing unnecessary conflicts in optimistic synchronization. Optimistic synchronization must ensure that any two concurrently executing trans...