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» Programming the FlexRAM parallel intelligent memory system
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143
Voted
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
15 years 7 months ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
104
Voted
ASAP
2007
IEEE
135views Hardware» more  ASAP 2007»
15 years 9 months ago
An Application Specific Memory Characterization Technique for Co-processor Accelerators
Commodity accelerator technologies including reconfigurable devices provide an order of magnitude performance improvement compared to mainstream microprocessor systems. A number o...
Sadaf R. Alam, Jeffrey S. Vetter, Melissa C. Smith
106
Voted
IEEEPACT
2008
IEEE
15 years 9 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
125
Voted
ICS
1999
Tsinghua U.
15 years 7 months ago
Improving the performance of speculatively parallel applications on the Hydra CMP
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
Kunle Olukotun, Lance Hammond, Mark Willey
159
Voted
UPP
2004
Springer
15 years 8 months ago
From Prescriptive Programming of Solid-State Devices to Orchestrated Self-organisation of Informed Matter
Abstract. Achieving real-time response to complex, ambiguous, highbandwidth data is impractical with conventional programming. Only the narrow class of compressible input-output ma...
Klaus-Peter Zauner