313 search results - page 45 / 63 » Properties of Euler Diagrams |
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
COOPIS
2004
IEEE
13 years 11 months ago
2004
IEEE
This paper focuses on the development of a principled methodology for the dependability analysis of composite Web services. The first step of the methodology involves a UML represe...
DIS
2006
Springer
13 years 11 months ago
2006
Springer
In this paper, we propose a method for discovering hidden information from large-scale item set data based on the symmetry of items. Symmetry is a fundamental concept in the theory...
CHARME
2001
Springer
13 years 11 months ago
2001
Springer
Model checking is the process of verifying whether a model of a concurrent system satisfies a specified temporal property. Symbolic algorithms based on Binary Decision Diagrams (BD...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
It has been shown that Binary Decision Diagram (BDD) based logic synthesis enjoys faster runtime than the classic logic synthesis systems based on Sum of Product (SOP) form. Howev...