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MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 7 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt
WWW
2005
ACM
14 years 9 months ago
Analysis of multimedia workloads with implications for internet streaming
In this paper, we study the media workload collected from a large number of commercial Web sites hosted by a major ISP and that collected from a large group of home users connecte...
Lei Guo, Songqing Chen, Zhen Xiao, Xiaodong Zhang
AFRICACRYPT
2009
Springer
14 years 3 months ago
Breaking KeeLoq in a Flash: On Extracting Keys at Lightning Speed
We present the first simple power analysis (SPA) of software implementations of KeeLoq. Our attack drastically reduces the efforts required for a complete break of remote keyless...
Markus Kasper, Timo Kasper, Amir Moradi, Christof ...
POPL
2011
ACM
12 years 12 months ago
Safe nondeterminism in a deterministic-by-default parallel language
A number of deterministic parallel programming models with strong safety guarantees are emerging, but similar support for nondeterministic algorithms, such as branch and bound sea...
Robert L. Bocchino Jr., Stephen Heumann, Nima Hona...
ENTCS
2006
168views more  ENTCS 2006»
13 years 9 months ago
A Functional Programming Framework for Latency Insensitive Protocol Validation
Latency insensitive protocols (LIPs) have been proposed as a viable means to connect synchronous IP blocks via long interconnects in a system-on-chip. The reason why one needs to ...
Syed Suhaib, Deepak Mathaikutty, Sandeep K. Shukla...