798 search results - page 45 / 160 » Proving More Properties with Bounded Model Checking |
PEPM
2009
ACM
15 years 9 months ago
2009
ACM
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
IFIP
2004
Springer
14 years 2 months ago
2004
Springer
Ensuring correctness of software by formal methods is a very relevant and widely studied problem. Automatic verification of software using model checkers from the state space exp...
ICSE
1999
IEEE-ACM
14 years 1 months ago
1999
IEEE-ACM
Formal verification methods are used only sparingly in software development. The most successful methods to date are based on the use of model checking tools. To use such he user ...
SOCA
2007
IEEE
14 years 3 months ago
2007
IEEE
Business Artifacts are the core entities used by businesses to record information pertinent to their operations. Business operational models are representations of the processing ...
FORMATS
2008
Springer
13 years 10 months ago
2008
Springer
Metric Temporal Logic (MTL) is a widely-studied real-time extension of Linear Temporal Logic. In this paper we survey results about the complexity of the satisfiability and model c...