Abstract. We present a new method for proving liveness and termination properties for fair concurrent programs, which does not rely on finding a ranking function or on computing th...
Parosh Aziz Abdulla, Bengt Jonsson, Ahmed Rezine, ...
Formal verification is an important issue in circuit and system design. In this context, Bounded Model Checking (BMC) is one of the most successful techniques. But even if all sp...
Abstract. In this paper, we present a three-valued property driven model checking algorithm for the logic CTL on hybrid automata. The technique of multivalued model checking for hy...
Kerstin Bauer, Raffaella Gentilini, Klaus Schneide...
Probabilistic verification of continuous-time stochastic processes has received increasing attention in the model-checking community in the past five years, with a clear focus on ...
— Probabilistic models are widely used to analyze embedded, networked, and more recently biological systems. Existing numerical analysis techniques are limited to finitestate mo...