Shallow trench isolation (STI) is the mainstream CMOS isolation technology. It uses chemical mechanical planarization (CMP) to remove excess of deposited oxide and attain a planar...
Andrew B. Kahng, Puneet Sharma, Alexander Zelikovs...
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
This paper proposes to combine spatial and color coherency with the pixel-wise GMM to determine the background model. We first represent each pixel with a hybrid feature vector, w...
Resource virtualization is currently being employed at all levels of the IT infrastructure to improve provisioning and manageability, with the goal of reducing total cost of owner...
—Supporting Quality-of-Service resource reservations for IP multicast flows is especially advantageous for distributed multimedia applications like video conferencing, 3D teleim...