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IPCCC
2006
IEEE
14 years 1 months ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
ML
2006
ACM
103views Machine Learning» more  ML 2006»
14 years 1 months ago
Type-safe distributed programming for OCaml
Existing ML-like languages guarantee type-safety, ensuring memty and protecting the invariants of abstract types, but only within single executions of single programs. Distributed...
John Billings, Peter Sewell, Mark R. Shinwell, Rok...
UIST
2006
ACM
14 years 1 months ago
CueTIP: a mixed-initiative interface for correcting handwriting errors
With advances in pen-based computing devices, handwriting has become an increasingly popular input modality. Researchers have put considerable effort into building intelligent rec...
Michael Shilman, Desney S. Tan, Patrice Simard
FDL
2005
IEEE
14 years 1 months ago
Mixing Synchronous Reactive and Untimed Models of Computation
The support of heterogeneity at the specification level, that is, the ability to mix several models of computation (MoCs) in the system-level specification, is becoming increasing...
Fernando Herrera, Eugenio Villar
ISLPED
2005
ACM
122views Hardware» more  ISLPED 2005»
14 years 1 months ago
A simple mechanism to adapt leakage-control policies to temperature
Leakage power reduction in cache memories continues to be a critical area of research because of the promise of a significant pay-off. Various techniques have been developed so fa...
Stefanos Kaxiras, Polychronis Xekalakis, Georgios ...