2555 search results - page 26 / 511 » Quantifiers and Working Memory |
RTSS
2003
IEEE
14 years 20 days ago
2003
IEEE
Any data exchanged between the processor and main memory uses the memory bus, sharing it with data exchanged between I/O devices and main memory. If the processor and a device try...
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
Portable systems demand energy efficiency in order to maximize battery life. IRAM architectures, which combine DRAM and a processor on the same chip in a DRAM process, are more en...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
There are two basic models for the on-chip memory in CMP systems: hardware-managed coherent caches and software-managed streaming memory. This paper performs a direct comparison o...
IFL
2001
Springer
13 years 12 months ago
2001
Springer
Map- and fold-like skeletons are a suitable abstractions to guide parallel program execution in functional array processing. However, when it comes to achieving high performance, i...
ISPASS
2003
IEEE
14 years 20 days ago
2003
IEEE
Emerging application domains such as interactive vision, animation, and multimedia collaboration display dynamic scalable parallelism, and high computational requirements, making ...