352 search results - page 19 / 71 » Quantifying Instruction Criticality |
PDPTA
2003
14 years 9 days ago
2003
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
MICRO
1993
IEEE
14 years 3 months ago
1993
IEEE
In this paper, we present a novel mechanism that implements register renaming, dynamic speculation and precise interrupts. Renaming of registers is performed during the instructio...
ASAP
2008
IEEE
14 years 5 months ago
2008
IEEE
Registers in processors generally contain words or, with the addition of multimedia extensions, short vectors of subwords of bytes or 16-bit elements. In this paper, we view the c...
TVLSI
2002
13 years 10 months ago
2002
In this paper, we propose a low-power approach to the design of embedded very long instruction word (VLIW) processor architectures based on the forwarding (or bypassing) hardware, ...
ISHPC
2003
Springer
14 years 4 months ago
2003
Springer
Abstract. In SMT processors several threads run simultaneously to increase available ILP, sharing but competing for resources. The instruction fetch policy plays a key role, determ...