352 search results - page 34 / 71 » Quantifying Instruction Criticality |
ISCAS
2005
IEEE
14 years 4 months ago
2005
IEEE
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
LCPC
2004
Springer
14 years 4 months ago
2004
Springer
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
ADAEUROPE
2010
Springer
14 years 3 months ago
2010
Springer
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...
MICRO
1997
IEEE
14 years 3 months ago
1997
IEEE
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...
ISCA
1994
IEEE
14 years 3 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...