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CODES
2007
IEEE
14 years 2 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
EMSOFT
2009
Springer
14 years 8 days ago
Serving embedded content via web applications: model, design and experimentation
Embedded systems such as smart cards or sensors are now widespread, but are often closed systems, only accessed via dedicated terminals. A new trend consists in embedding Web serv...
Simon Duquennoy, Gilles Grimaud, Jean-Jacques Vand...
WOSP
2010
ACM
13 years 7 months ago
Automatically improve software architecture models for performance, reliability, and cost using evolutionary algorithms
Quantitative prediction of quality properties (i.e. extrafunctional properties such as performance, reliability, and cost) of software architectures during design supports a syste...
Anne Martens, Heiko Koziolek, Steffen Becker, Ralf...
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 2 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
PODC
1994
ACM
13 years 11 months ago
A Performance Evaluation of Lock-Free Synchronization Protocols
In this paper, we investigate the practical performance of lock-free techniques that provide synchronization on shared-memory multiprocessors. Our goal is to provide a technique t...
Anthony LaMarca