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ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
14 years 1 months ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
GRID
2005
Springer
14 years 2 months ago
Differential checkpointing for reducing memory requirements in optimized SOAP deserialization
Abstract— Differential Deserialization (DDS) is a SOAP optimization technique wherein servers save checkpoints and parser states associated with portions of previously received m...
Nayef Abu-Ghazaleh, Michael J. Lewis
CMG
2003
13 years 10 months ago
Virtual Memory Constraints in 32-bit Windows
Many server workloads can exhaust the 32-bit virtual address space in the Windows server operating systems. Machines configured with 2 GB or more of RAM installed are particularly...
Mark B. Friedman
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 8 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
WOSP
2004
ACM
14 years 2 months ago
Collecting whole-system reference traces of multiprogrammed and multithreaded workloads
The simulated evaluation of memory management policies relies on reference traces—logs of memory operations performed by running processes. No existing approach to reference tra...
Scott F. Kaplan