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MICRO
2009
IEEE
121views Hardware» more  MICRO 2009»
14 years 3 months ago
Improving memory bank-level parallelism in the presence of prefetching
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
Chang Joo Lee, Veynu Narasiman, Onur Mutlu, Yale N...
IPPS
2007
IEEE
14 years 3 months ago
A Key-based Adaptive Transactional Memory Executor
Software transactional memory systems enable a programmer to easily write concurrent data structures such as lists, trees, hashtables, and graphs, where non-conflicting operation...
Tongxin Bai, Xipeng Shen, Chengliang Zhang, Willia...
ROBOCOMM
2007
IEEE
14 years 3 months ago
Shared memories: a trail-based coordination server for robot teams
Abstract—Robust, dependable and concise coordination between members of a robot team is a critical ingredient of any such collective activity. Depending on the availability and t...
George Roussos, Dikaios Papadogkonas, J. Taylor, D...
ICCV
1995
IEEE
14 years 10 days ago
Object Indexing Using an Iconic Sparse Distributed Memory
A general-purpose object indexingtechnique is described that combines the virtues of principal component analysis with the favorable matching properties of high-dimensional spaces...
Rajesh P. N. Rao, Dana H. Ballard
ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan