17 search results - page 2 / 4 » Quaternary Arithmetic Logic Unit on a Programmable Logic Dev... |
ARITH
2001
IEEE
14 years 2 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
POPL
2010
ACM
14 years 24 days ago
2010
ACM
Computer science has served to insulate programs and programmers from knowledge of the underlying mechanisms used to manipulate information, however this fiction is increasingly h...
DELTA
2002
IEEE
14 years 3 months ago
2002
IEEE
Teaching the practical aspects of device and chip design in New Zealand presents many problems, including high manufacturing costs, long lead times, and the lack of local industry...
CDES
2008
13 years 11 months ago
2008
- The Cell Matrix Architecture is a massive array of dynamically self-configurable, uniformly connected, identical computational units. This architecture can enable efficient, prac...
ASAP
2007
IEEE
14 years 5 days ago
2007
IEEE
FPGA (Field Programmable Gate Array) based reconfigurable processor has been shown to meet the increasingly challenging performance targets and shorter time-to-market pressures. I...