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» Queues, stores, and tableaux
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HPCA
2006
IEEE
14 years 10 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
DKE
2002
94views more  DKE 2002»
13 years 9 months ago
Tie-breaking strategies for fast distance join processing
The distance join is a spatial join that finds pairs of closest objects in the order of distance by associating two spatial data sets. The distance join stores node pairs in a pri...
Hyoseop Shin, Bongki Moon, Sukho Lee
CAL
2010
13 years 6 months ago
SMT-Directory: Efficient Load-Load Ordering for SMT
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
A. Hilton, A. Roth
IPPS
2006
IEEE
14 years 3 months ago
SAMIE-LSQ: set-associative multiple-instruction entry load/store queue
The load/store queue (LSQ) is one of the most complex parts of contemporary processors. Its latency is critical for the processor performance and it is usually one of the processo...
Jaume Abella, Antonio González
ICC
2007
IEEE
126views Communications» more  ICC 2007»
14 years 4 months ago
Stochastic RED and Its Applications
Abstract— In this paper, we present a novel fair queue management algorithm called Stochastic RED (StoRED), inspired by the well known stochastic fair queuing and based on the ra...
Shan Chen, Zhen Zhou, Brahim Bensaou