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ASPLOS
2009
ACM
16 years 2 months ago
Mixed-mode multicore reliability
Future processors are expected to observe increasing rates of hardware faults. Using Dual-Modular Redundancy (DMR), two cores of a multicore can be loosely coupled to redundantly ...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
LCTRTS
2010
Springer
15 years 9 months ago
Modeling structured event streams in system level performance analysis
This paper extends the methodology of analytic real-time analysis of distributed embedded systems towards merging and extracting sub-streams based on event type information. For e...
Simon Perathoner, Tobias Rein, Lothar Thiele, Kai ...
129
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FPGA
2001
ACM
162views FPGA» more  FPGA 2001»
15 years 6 months ago
Reprogrammable network packet processing on the field programmable port extender (FPX)
A prototype platform has been developed that allows processing of packets at the edge of a multi-gigabit-per-second network switch. This system, the Field Programmable Port Extend...
John W. Lockwood, Naji Naufel, Jonathan S. Turner,...
ICIP
2005
IEEE
16 years 4 months ago
VIPS - a highly tuned image processing software architecture
This paper describes the VIPS image processing library and user-interface. VIPS is used in many museums and galleries in Europe, America and Australia for image capture, analysis a...
Kirk Martinez, John Cupitt
AOSD
2007
ACM
15 years 6 months ago
Declarative failure recovery for sensor networks
Wireless sensor networks consist of a system of distributed sensors embedded in the physical world, and promise to allow observation of previously unobservable phenomena. Since th...
Ramakrishna Gummadi, Nupur Kothari, Todd D. Millst...