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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
13 years 10 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
DATE
2008
IEEE
99views Hardware» more  DATE 2008»
14 years 2 months ago
GMDS: Hardware implementation of novel real output queuing architecture
In this paper, a real output queuing switch prototype implementation is presented. This implementation is based on a novel high speed multidrop backplane and a general purpose lin...
R. Arteaga, Félix Tobajas, Roberto Esper-Ch...
DDECS
2008
IEEE
146views Hardware» more  DDECS 2008»
14 years 2 months ago
Novel Hardware Implementation of Adaptive Median Filters
—A new FPGA implementation for adaptive median filters is proposed. Adaptive median filters exhibit better filtering properties than standard median filters; however, their i...
Zdenek Vasícek, Lukás Sekanina
ICMCS
2006
IEEE
117views Multimedia» more  ICMCS 2006»
14 years 2 months ago
Data Hiding for Speech Bandwidth Extension and its Hardware Implementation
Most of the current speech transmission systems are only able to deliver speech signals in a narrow frequency band. This narrowband speech is characterized by a thin and muffled ...
Fan Wu, Siyue Chen, Henry Leung
EUROPAR
2007
Springer
14 years 2 months ago
Hirschberg's Algorithm on a GCA and Its Parallel Hardware Implementation
We present in detail a GCA (Global Cellular Automaton) algorithm with 3n cells for Hirschberg’s algorithm which determines the connected components of a n-node undirected graph w...
Johannes Jendrsczok, Rolf Hoffmann, Jörg Kell...