211 search results - page 14 / 43 » REDEFIS: a system with a redefinable instruction set process... |
TVLSI
2008
2008
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
13 years 7 months ago
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
ISSS
1998
IEEE
13 years 12 months ago
1998
IEEE
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
EH
2004
IEEE
13 years 11 months ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
COMPCON
1996
IEEE
13 years 11 months ago
1996
IEEE
An important objective of the MicroUnity mediaprocessor is to allow the design of systems that replace hardwired functionality with software. One of the key design techniques that...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...