211 search results - page 39 / 43 » REDEFIS: a system with a redefinable instruction set process... |
SBACPAD
2007
IEEE
14 years 1 months ago
2007
IEEE
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
Dynamic binary translation (DBT) can provide security, virtualization, resource management and other desirable services to embedded systems. Although DBT has many benefits, its r...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
While Sequential Consistency (SC) is the most intuitive memory consistency model and the one most programmers likely assume, current multiprocessors do not support it. Instead, th...
HOTI
2005
IEEE
14 years 1 months ago
2005
IEEE
Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bo...