Sciweavers

1304 search results - page 45 / 261
» RTOS Modeling for System Level Design
Sort
View
141
Voted
DAC
2007
ACM
15 years 7 months ago
Verification Methodologies in a TLM-to-RTL Design Flow
SoC based system developments commonly employ ESL design ogies and utilize multiple levels of abstract models to provide feasibility study models for architects and development pl...
Atsushi Kasuya, Tesh Tesfaye
120
Voted
OTM
2007
Springer
15 years 10 months ago
Building Adaptive Systems with Service Composition Frameworks
Frameworks that support the implementation and execution of service compositions are a fundamental component of middleware infrastructures that support the design of adaptive syste...
Liliana Rosa, Luís Rodrigues, Antóni...
UIST
1998
ACM
15 years 8 months ago
Cirrin: A Word-Level Unistroke Keyboard for Pen Input
We present a new system, called Cirrin, for pen input of ASCII characters using word-level unistrokes. Our system addresses the tradeoff between speed and accuracy of penbased tex...
Jennifer Mankoff, Gregory D. Abowd
162
Voted
TCAD
2010
121views more  TCAD 2010»
14 years 10 months ago
Translation Validation of High-Level Synthesis
The growing complexity of systems and their implementation into silicon encourages designers to look for model designs at higher levels of abstraction and then incrementally build ...
Sudipta Kundu, Sorin Lerner, Rajesh K. Gupta
124
Voted
DAC
2004
ACM
16 years 4 months ago
High level cache simulation for heterogeneous multiprocessors
As multiprocessor systems-on-chip become a reality, performance modeling becomes a challenge. To quickly evaluate many architectures, some type of high-level simulation is require...
Joshua J. Pieper, Alain Mellan, JoAnn M. Paul, Don...