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118
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ASPDAC
2006
ACM
141views Hardware» more  ASPDAC 2006»
15 years 6 months ago
Depth-driven verification of simultaneous interfaces
The verification of modern computing systems has grown to dominate the cost of system design, often with limited success as designs continue to be released with latent bugs. This t...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
123
Voted
EUROCRYPT
2006
Springer
15 years 6 months ago
Learning a Parallelepiped: Cryptanalysis of GGH and NTRU Signatures
Abstract. Lattice-based signature schemes following the GoldreichGoldwasser-Halevi (GGH) design have the unusual property that each signature leaks information on the signer's...
Phong Q. Nguyen, Oded Regev
107
Voted
EKAW
2000
Springer
15 years 6 months ago
Informed Selection of Training Examples for Knowledge Refinement
Knowledge refinement tools rely on a representative set of training examples to identify and repair faults in a knowledge based system (KBS). In real environments it is often diffi...
Nirmalie Wiratunga, Susan Craw
122
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ARVLSI
1995
IEEE
132views VLSI» more  ARVLSI 1995»
15 years 6 months ago
Standard CMOS active pixel image sensors for multimedia applications
The task of image acquisition is completely dominated by CCD-based sensors fabricated on specialized process lines. These devices provide an essentially passive means of detecting...
Alex G. Dickinson, Bryan D. Ackland, El-Sayed Eid,...
114
Voted
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
15 years 6 months ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...