379 search results - page 12 / 76 » Rating Compiler Optimizations for Automatic Performance Tuni... |
ISCA
1995
IEEE
13 years 11 months ago
1995
IEEE
Recent superscalar processors issue four instructions per cycle. These processors are also powered by highly-parallel superscalar cores. The potential performance can only be expl...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Targeted optimization of program segments can provide an additional program speedup over the highest default optimization level, such as -O3 in GCC. The key challenge is how to au...
ICCS
2009
Springer
14 years 2 months ago
2009
Springer
The development of optimized codes is time-consuming and requires extensive architecture, compiler, and language expertise, therefore, computational scientists are often forced to ...
IEEEPACT
2009
IEEE
14 years 2 months ago
2009
IEEE
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
A new method for scale-aware saliency detection is introduced in this work. Scale determination is realized through a fast scale-space algorithm using color and texture. Scale inf...