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DATE
2007
IEEE
72views Hardware» more  DATE 2007»
14 years 1 months ago
The impact of loop unrolling on controller delay in high level synthesis
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
Srikanth Kurra, Neeraj Kumar Singh, Preeti Ranjan ...
IEEEPACT
2006
IEEE
14 years 1 months ago
An empirical evaluation of chains of recurrences for array dependence testing
Code restructuring compilers rely heavily on program analysis techniques to automatically detect data dependences between program statements. Dependences between statement instanc...
Johnnie Birch, Robert A. van Engelen, Kyle A. Gall...
SIGMOD
2007
ACM
121views Database» more  SIGMOD 2007»
14 years 7 months ago
EaseDB: a cache-oblivious in-memory query processor
We propose to demonstrate EaseDB, the first cache-oblivious query processor for in-memory relational query processing. The cacheoblivious notion from the theory community refers t...
Bingsheng He, Yinan Li, Qiong Luo, Dongqing Yang
PPOPP
2009
ACM
14 years 8 months ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle
IPPS
2002
IEEE
14 years 14 days ago
Effective Cross-Platform, Multilevel Parallelism via Dynamic Adaptive Execution
This paper presents preliminary efforts to develop compilation and execution environments that achieve performance portability of multilevel parallelization on hierarchical archit...
Walden Ko, Mark N. Yankelevsky, Dimitrios S. Nikol...