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IPPS
1996
IEEE
14 years 28 days ago
Kiloprocessor Extensions to SCI
To expand the Scalable Coherent Interface's (SCI) capabilities so it can be used to efficiently handle sharing in systems of hundreds or even thousands of processors, the SCI...
Stefanos Kaxiras
ASPLOS
1991
ACM
14 years 9 days ago
Performance Evaluation of Memory Consistency Models for Shared Memory Multiprocessors
The memory consistency model supported by a multiprocessor architecture determines the amount of buffering and pipelining that may be used to hide or reduce the latency of memory ...
Kourosh Gharachorloo, Anoop Gupta, John L. Henness...
HPDC
1995
IEEE
14 years 10 days ago
Disk-Directed I/O for an Out-of-Core Computation
New file systems are critical to obtain good I/O performance on large multiprocessors. Several researchers have suggested the use of collective file-system operations, in which ...
David Kotz
DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 3 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...
FTCS
1997
115views more  FTCS 1997»
13 years 10 months ago
Robust Emulation of Shared Memory Using Dynamic Quorum-Acknowledged Broadcasts
This paper presents robust emulation of multi-writer/multi-reader registers in message-passing systems using dynamic quorum con gurations. In addition to processor and link failur...
Nancy A. Lynch, Alexander A. Shvartsman