Sciweavers

101 search results - page 14 / 21
» Realism in Statistical Analysis of Worst Case Execution Time...
Sort
View
CODES
2007
IEEE
14 years 1 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
RTSS
2005
IEEE
14 years 8 days ago
Energy-Aware Modeling and Scheduling of Real-Time Tasks for Dynamic Voltage Scaling
Abstract— Dynamic voltage scaling (DVS) is a promising technique for battery-powered systems to conserve energy consumption. Most existing DVS algorithms assume information about...
Xiliang Zhong, Cheng-Zhong Xu
RTS
2006
129views more  RTS 2006»
13 years 6 months ago
Modeling out-of-order processors for WCET analysis
Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typic...
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra
FORMATS
2007
Springer
13 years 10 months ago
Combining Formal Verification with Observed System Execution Behavior to Tune System Parameters
Resource limited DRE (Distributed Real-time Embedded) systems can benefit greatly from dynamic adaptation of system parameters. We propose a novel approach that employs iterative t...
Minyoung Kim, Mark-Oliver Stehr, Carolyn L. Talcot...
CASES
2009
ACM
14 years 1 months ago
Tight WCRT analysis of synchronous C programs
Accurate estimation of the tick length of a synchronous program is essential for efficient and predictable implementations that are devoid of timing faults. The techniques to dete...
Partha S. Roop, Sidharta Andalam, Reinhard von Han...