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» Reasoning about Memory Layouts
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FMCAD
2008
Springer
13 years 11 months ago
Word-Level Sequential Memory Abstraction for Model Checking
el Sequential Memory Abstraction for Model Checking Per Bjesse Advanced Technology Group Synopsys Inc. Many designs intermingle large memories with wide data paths and nontrivial c...
Per Bjesse
ACMMSP
2006
ACM
257views Hardware» more  ACMMSP 2006»
14 years 3 months ago
Memory models for open-nested transactions
Open nesting provides a loophole in the strict model of atomic transactions. Moss and Hosking suggested adapting open nesting for transactional memory, and Moss and a group at Sta...
Kunal Agrawal, Charles E. Leiserson, Jim Sukha
PPOPP
2009
ACM
14 years 4 months ago
NePalTM: design and implementation of nested parallelism for transactional memory systems
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...
Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Ta...
ICS
1999
Tsinghua U.
14 years 2 months ago
An experimental evaluation of tiling and shackling for memory hierarchy management
On modern computers, the performance of programs is often limited by memory latency rather than by processor cycle time. To reduce the impact of memory latency, the restructuring ...
Induprakas Kodukula, Keshav Pingali, Robert Cox, D...
ESOP
2012
Springer
12 years 5 months ago
Concurrent Library Correctness on the TSO Memory Model
Abstract. Linearizability is a commonly accepted notion of correctness for libraries of concurrent algorithms. Unfortunately, it is only appropriate for sequentially consistent mem...
Sebastian Burckhardt, Alexey Gotsman, Madanlal Mus...