Sciweavers

    174 search results - page 16 / 35
    » Reclocking for high-level synthesis
    Sort
    View
    ICCAD
    1990
    IEEE
    52views Hardware» more  ICCAD 1990»
    Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis
    13 years 11 months ago
    Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis
    Download  www.cse.hcmut.edu.vn
    D. L. Springer, Donald E. Thomas
    claim paper
    Read More »
    AAAI
    2007
    96views Intelligent Agents» more  AAAI 2007»
    Synthesis of Constraint-Based Local Search Algorithms from High-Level Models
    13 years 9 months ago
    Synthesis of Constraint-Based Local Search Algorithms from High-Level Models
    Download  www.cs.brown.edu
    The gap in automation between MIP/SAT solvers and those for constraint programming and constraint-based local search hinders experimentation and adoption of these technologies and...
    Pascal Van Hentenryck, Laurent D. Michel
    claim paper
    Read More »
    ARC
    2008
    Springer
    99views Hardware» more  ARC 2008»
    Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
    13 years 9 months ago
    Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens
    Download  www.eis.cs.tu-bs.de
    We present an improved method for scheduling speculative data paths which relies on cancel tokens to undo computations in misspeculated paths. Performancewise, this method is consi...
    Hagen Gädke, Andreas Koch
    claim paper
    Read More »
    IEICET
    2008
    63views more  IEICET 2008»
    High-Level Synthesis of Software Function Calls
    13 years 7 months ago
    High-Level Synthesis of Software Function Calls
    Download  ist.ksc.kwansei.ac.jp
    Masanari Nishimura, Nagisa Ishiura, Yoshiyuki Ishi...
    claim paper
    Read More »
    VLSID
    2005
    IEEE
    140views VLSI» more  VLSID 2005»
    Variable Resizing for Area Improvement in Behavioral Synthesis
    14 years 7 months ago
    Variable Resizing for Area Improvement in Behavioral Synthesis
    Download  www.cse.iitk.ac.in
    High level synthesis tools transform an algorithmic description to a register transfer language (RTL) description of the hardware. The algorithm behavior is typically described in...
    R. Gopalakrishnan, Rajat Moona
    claim paper
    Read More »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.