A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
The interconnect plays a key role in both the cost and performance of large-scale HPC systems. The cost of future high-bandwidth electronic interconnects is expected to increase d...
Kevin J. Barker, Alan F. Benner, Raymond R. Hoare,...
We introduce MaRS, a reconfigurable, parallel computing engine with special emphasis on scalability, lending itself to the computation-/data-intensive multimedia data processing a...
Nozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kama...
Distributed computational grids depend on TCP to ensure reliable end-to-end communication between nodes across the wide-area network (WAN). Unfortunately, TCP performance can be a...
We describe a software infrastructure designed to support the development of applications that use high-speed networks to connect geographically distributed supercomputers, databa...
Ian T. Foster, Nicholas T. Karonis, Carl Kesselman...