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TCAD
2008
167views more  TCAD 2008»
13 years 8 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
14 years 21 days ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 2 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
ERSA
2010
153views Hardware» more  ERSA 2010»
13 years 6 months ago
VAPRES: A Customizable and Flexible Base Architecture for Partially Reconfigurable Systems
- Partial reconfiguration (PR) enhances traditional FPGA-based high-performance reconfigurable computing by providing additional benefits such as reduced area and memory requiremen...
Ann Gordon-Ross, Abelardo Jara-Berrocal
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
14 years 25 days ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings