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CDES
2006
184views Hardware» more  CDES 2006»
13 years 11 months ago
Compilation for Future Nanocomputer Architectures
Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
Thomas P. Way
IJFCS
2006
82views more  IJFCS 2006»
13 years 9 months ago
Routing Multiple Width Communications on the Circuit Switched Tree
Dynamically reconfigurable architectures offer extremely fast solutions to various problems. The Circuit Switched Tree (CST) is an important interconnect used to implement such ar...
Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L...
ISMAR
2002
IEEE
14 years 2 months ago
Circular Data Matrix Fiducial System and Robust Image Processing for a Wearable Vision-Inertial Self-Tracker
A wearable low-power hybrid vision-inertial tracker has been demonstrated based on a flexible sensor fusion core architecture, which allows easy reconfiguration by plugging-in dif...
Leonid Naimark, Eric Foxlin
DASIP
2010
13 years 4 months ago
High level design space exploration of RVC codec specifications for multi-core heterogeneous platforms
Nowadays, the design flow of complex signal processing embedded systems starts with a specification of the application by means of a large and sequential program (usually in C/C++...
Christophe Lucarz, Ghislain Roquier, Marco Mattave...
ICIP
2009
IEEE
13 years 7 months ago
Towards a comprehensive RVC VTL: A CAL description of an efficient AVC baseline encoder
The Video Tool Library (VTL) is one of the major normative components of the Reconfigurable Video Coding (RVC) standard. It specifies the set of functional units (FUs) that may be...
Hussein Aman-Allah, Ehab Hanna, Karim Maarouf, Iha...