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ICASSP
2010
IEEE
13 years 8 months ago
Buffer management for multi-application image processing on multi-core platforms: Analysis and case study
Due to the limited amounts of on-chip memory, large volumes of data, and performance and power consumption overhead associated with interprocessor communication, efficient managem...
Dong-Ik Ko, Nara Won, Shuvra S. Bhattacharyya
DFT
2006
IEEE
143views VLSI» more  DFT 2006»
14 years 2 months ago
Defect Tolerant and Energy Economized DSP Plane of a 3-D Heterogeneous SoC
This paper1 discusses a defect tolerant and energy economized computing array for the DSP plane of a 3-D Heterogeneous System on a Chip. We present the J-platform, which employs c...
Vijay K. Jain, Glenn H. Chapman
ICIP
2010
IEEE
13 years 6 months ago
P2P group communication using Scalable Video Coding
P2P-streaming has become of high interest in the last years, since it reduces the load on expensive servers, due to the participation of receivers in the media transmission. In th...
Yago Sanchez de la Fuente, Thomas Schierl, Corneli...
ICIP
2002
IEEE
14 years 9 months ago
Data rate smoothing in interactive walkthrough applications using 2D prefetching
Compared to a geometric approach, image based rendering applied to 3D view reconstruction doesn't require 3D model construction and doesn't depend on the complexity of t...
Vitali Zagorodnov, Peter J. Ramadge
TPDS
1998
92views more  TPDS 1998»
13 years 7 months ago
An Efficient Algorithm for Row Minima Computations on Basic Reconfigurable Meshes
—A matrix A of size m œ n containing items from a totally ordered universe is termed monotone if, for every i, j, 1 ‹ i < j ‹ m, the minimum value in row j lies below or to...
Koji Nakano, Stephan Olariu