75 search results - page 12 / 15 » Reconfiguration for Fault Tolerance Using Graph Grammars |
DATE
2010
IEEE
14 years 17 days ago
2010
IEEE
—Time-dependent performance degradation due to transistor aging caused by mechanisms such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) is one o...
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
This paper examines the task of constructing boundedtime self-stabilizing rule-based systems that take their input from an external environment. Bounded response-time and self-sta...
GLVLSI
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a systematic design methodology for yield enhancement of asynchronous logic circuits using 3-D (3-Dimensional) integration technology. In this design, the targ...
ISCI
2007
13 years 7 months ago
2007
In this paper, we explore the 2-extra connectivity and 2-extra-edge-connectivity of the folded hypercube FQn. We show that j2(FQn) = 3n À 2 for n P 8; and k2(FQn) = 3n À 1 for n...
HIS
2009
13 years 5 months ago
2009
Abstract--The generalized minimum vertex-biconnected network problem plays an important role in the design of survivable backbone networks that should be fault tolerant to single c...