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CCGRID
2001
IEEE
13 years 11 months ago
An Adaptive, Reconfigurable Interconnect for Computational Clusters
This paper describes the principles of an original adaptive interconnect for a computational cluster. Torus topology (2d or 3d) is used as a basis but nodes are allowed to effecti...
Alexander V. Shafarenko, Vladimir Vasekin
COLT
1992
Springer
13 years 12 months ago
On the Computational Power of Neural Nets
This paper deals with finite size networks which consist of interconnections of synchronously evolving processors. Each processor updates its state by applying a "sigmoidal&q...
Hava T. Siegelmann, Eduardo D. Sontag
CF
2007
ACM
13 years 12 months ago
Reconfigurable hybrid interconnection for static and dynamic scientific applications
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
Shoaib Kamil, Ali Pinar, Daniel Gunter, Michael Li...
FCCM
2007
IEEE
122views VLSI» more  FCCM 2007»
13 years 11 months ago
Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing
While medium- and large-sized computing centers have increasingly relied on clusters of commodity PC hardware to provide cost-effective capacity and capability, it is not clear th...
Ron Sass, William V. Kritikos, Andrew G. Schmidt, ...
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
14 years 26 days ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...