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ANCS
2009
ACM
13 years 6 months ago
An adaptive hash-based multilayer scheduler for L7-filter on a highly threaded hierarchical multi-core server
Ubiquitous multi-core-based web servers and edge routers are increasingly popular in deploying computationally intensive Deep Packet Inspection (DPI) programs. Previous work has s...
Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan, Bin L...
IPPS
2000
IEEE
14 years 18 days ago
ATOLL, a New Switched, High Speed Interconnect in Comparison to Myrinet and SCI
Abstract. While standard processors achieve supercomputer performance, a performance gap exists between the interconnect of MPP's and COTS. Standard solutions like Ethernet ca...
Markus Fischer, Ulrich Brüning, Jörg Klu...
CORR
2006
Springer
99views Education» more  CORR 2006»
13 years 9 months ago
Intermediate Performance of Rateless Codes
Abstract-- Fountain codes are designed so that all input symbols can be recovered from a slightly larger number of coded symbols, with high probability using an iterative decoder. ...
Sujay Sanghavi
BMCBI
2005
134views more  BMCBI 2005»
13 years 9 months ago
Windows .NET Network Distributed Basic Local Alignment Search Toolkit (W.ND-BLAST)
Background: BLAST is one of the most common and useful tools for Genetic Research. This paper describes a software application we have termed Windows .NET Distributed Basic Local ...
Scot E. Dowd, Joaquin Zaragoza, Javier R. Rodrigue...
ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 3 months ago
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
Weidong Shi, Hsien-Hsin S. Lee, Laura Falk, Mrinmo...