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HPCA
2006
IEEE
14 years 8 months ago
BulletProof: a defect-tolerant CMP switch architecture
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...
Kypros Constantinides, Stephen Plaza, Jason A. Blo...
ICNP
2007
IEEE
14 years 2 months ago
Inferring the Origin of Routing Changes using Link Weights
— The global Internet routing infrastructure is a large and complex distributed system where routing changes occur constantly. Our objective in this paper is to develop a simple ...
Mohit Lad, Ricardo V. Oliveira, Daniel Massey, Lix...
TC
2010
13 years 6 months ago
PERFECTORY: A Fault-Tolerant Directory Memory Architecture
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
INFOCOM
2007
IEEE
14 years 2 months ago
Millimeter Wave WPAN: Cross-Layer Modeling and Multi-Hop Architecture
— The 7 GHz of unlicensed spectrum in the 60 GHz band offers the potential for multiGigabit indoor wireless personal area networking (WPAN). With recent advances in the speed of ...
Sumit Singh, Federico Ziliotto, Upamanyu Madhow, E...
SAFECOMP
2005
Springer
14 years 1 months ago
Are High-Level Languages Suitable for Robust Telecoms Software?
In the telecommunications sector product development must minimise time to market while delivering high levels of dependability, availability, maintainability and scalability. High...
Jan Henry Nyström, Philip W. Trinder, David J...