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ESM
2000
13 years 9 months ago
SEP: Simulation framework to evaluate digital hardware architectures
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to ...
Frédéric Mallet, Fernand Boér...
OSDI
2006
ACM
14 years 7 months ago
A Modular Network Layer for Sensornets
An overall sensornet architecture would help tame the increasingly complex structure of wireless sensornet software and help foster greater interoperability between different code...
Cheng Tien Ee, Rodrigo Fonseca, Sukun Kim, Daekyeo...
CONCUR
2003
Springer
14 years 24 days ago
Multi-Valued Model Checking via Classical Model Checking
Multi-valued model-checking is an extension of classical model-checking to reasoning about systems with uncertain information, which are common during early design stages. The addi...
Arie Gurfinkel, Marsha Chechik
ICMCS
2006
IEEE
179views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Scalable Rate-Distortion-Computation Hardware Accelerator for MCTF and ME
Motion-Compensated Temporal Filtering (MCTF) is an innovative prediction scheme for video coding and the core technology of scalable extension of H.264/AVC. The first MCTF and ME...
Yi-Hau Chen, Ching-Yeh Chen, Chih-Chi Cheng, Liang...
ECBS
2003
IEEE
91views Hardware» more  ECBS 2003»
14 years 26 days ago
Modeling and Building Reliable, Re-Useable Software
Agile Software practices place great emphasis on coding, yet coding is time-consuming, difficult, and the source of many errors. The paper describes a way in which the specificati...
Ferdinand Wagner, Peter Wolstenholme