18 search results - page 1 / 4 » Reducing Communication Latency with Path Multiplexing in Opt... |
HPCA
1995
IEEE
14 years 1 months ago
1995
IEEE
—Reducing communication latency, which is a performance bottleneck in optically interconnected multiprocessor systems, is of prominent importance. A conventional approach for est...
HPCA
1997
IEEE
14 years 2 months ago
1997
IEEE
ÐIn this paper, we study distributed path reservation protocols for multiplexed all-optical interconnection networks. The path reservation protocols negotiate the reservation and ...
HIPEAC
2011
Springer
12 years 9 months ago
2011
Springer
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
CODES
2007
IEEE
14 years 4 months ago
2007
IEEE
Networks on Chip (NoC) have emerged as the design paradigm for scalable System on Chip communication infrastructure. A growing number of applications, often with firm (FRT) or so...
SBCCI
2005
ACM
14 years 3 months ago
2005
ACM
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...