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» Reducing Compilation Time Overhead in Compiled Simulators
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IPPS
2005
IEEE
14 years 1 months ago
Fast Address Translation Techniques for Distributed Shared Memory Compilers
The Distributed Shared Memory (DSM) model is designed to leverage the ease of programming of the shared memory paradigm, while enabling the highperformance by expressing locality ...
François Cantonnet, Tarek A. El-Ghazawi, Pa...
ICESS
2005
Springer
14 years 1 months ago
Separate Compilation for Synchronous Modules
Abstract. Synchronous models are useful for designing real-time embedded systems because they provide timing control and deterministic concurrency. However, the semantics of such m...
Jia Zeng, Stephen A. Edwards
ISQED
2006
IEEE
153views Hardware» more  ISQED 2006»
14 years 1 months ago
Improving Transient Error Tolerance of Digital VLSI Circuits Using RObustness COmpiler (ROCO)
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two...
Chong Zhao, Sujit Dey
ISMIS
2005
Springer
14 years 1 months ago
Normal Forms for Knowledge Compilation
A class of formulas called factored negation normal form is introduced. They are closely related to BDDs, but there is a DPLL-like tableau procedure for computing them that operate...
Reiner Hähnle, Neil V. Murray, Erik Rosenthal
IEEEPACT
2003
IEEE
14 years 1 months ago
Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures
This paper describes Compiler-Directed Content-Aware Prefetching (CDCAP), an integrated compiler and hardware approach for prefetching dynamic data structures. The approach utiliz...
Hassan Al-Sukhni, Ian Bratt, Daniel A. Connors