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» Reducing Compilation Time Overhead in Compiled Simulators
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ISPASS
2009
IEEE
14 years 2 months ago
Machine learning based online performance prediction for runtime parallelization and task scheduling
—With the emerging many-core paradigm, parallel programming must extend beyond its traditional realm of scientific applications. Converting existing sequential applications as w...
Jiangtian Li, Xiaosong Ma, Karan Singh, Martin Sch...
ICCAD
2001
IEEE
126views Hardware» more  ICCAD 2001»
14 years 5 months ago
Constraint Satisfaction for Relative Location Assignment and Scheduling
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...
ATS
2001
IEEE
172views Hardware» more  ATS 2001»
13 years 11 months ago
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters
Testing and diagnosis are important issues in system-onchip (SOC) development, as more and more embedded cores are being integrated into the chips. In this paper we propose a buil...
Chih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih...
NGC
2001
Springer
157views Communications» more  NGC 2001»
14 years 15 days ago
Aggregated Multicast with Inter-Group Tree Sharing
IP multicast suffers from scalability problems for large numbers of multicast groups, since each router keeps forwarding state proportional to the number of multicast tree passing ...
Aiguo Fei, Jun-Hong Cui, Mario Gerla, Michalis Fal...
WSC
1997
13 years 9 months ago
A Virtual PNNI Network Testbed
We describe our experiences designing and implementing a virtual PNNI network testbed. The network elements and signaling protocols modeled are consistent with the ATM Forum PNNI ...
Kalyan S. Perumalla, Matthew Andrews, Sandeep N. B...