Sciweavers

339 search results - page 7 / 68
» Reducing Memory Ordering Overheads in Software Transactional...
Sort
View
ICDCN
2012
Springer
12 years 4 months ago
Lifting the Barriers - Reducing Latencies with Transparent Transactional Memory
Synchronization in distributed systems is expensive because, in general, threads must stall to obtain a lock or to operate on volatile data. Transactional memory, on the other hand...
Annette Bieniusa, Thomas Fuhrmann
ISCA
2006
IEEE
144views Hardware» more  ISCA 2006»
13 years 8 months ago
Conditional Memory Ordering
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
Christoph von Praun, Harold W. Cain, Jong-Deok Cho...
EUROSYS
2009
ACM
14 years 5 months ago
xCalls: safe I/O in memory transactions
Memory transactions, similar to database transactions, allow a programmer to focus on the logic of their program and let the system ensure that transactions are atomic and isolate...
Haris Volos, Andres Jaan Tack, Neelam Goyal, Micha...
EUROSYS
2007
ACM
14 years 5 months ago
Removing the memory limitations of sensor networks with flash-based virtual memory
Virtual memory has been successfully used in different domains to extend the amount of memory available to applications. We have adapted this mechanism to sensor networks, where,...
Andreas Lachenmann, Pedro José Marró...
HIPEAC
2010
Springer
13 years 6 months ago
Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems
We propose a new design for an energy-efficient hardware transactional memory (HTM) system for power-aware embedded devices. Prior hardware transactional memory designs proposed a ...
Cesare Ferri, Samantha Wood, Tali Moreshet, R. Iri...