437 search results - page 75 / 88 » Reducing Memory Sharing Overheads in Distributed JVMs |
ICPADS
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract— We present a new distributed approach that establishes reputation-based trust among sensor nodes in order to identify malfunctioning and malicious sensor nodes and mini...
IPPS
2007
IEEE
14 years 2 months ago
2007
IEEE
The Xilinx Virtex family of FPGAs provides the ability to perform partial run-time reconfiguration, also known as dynamic partial reconfiguration (DPR). Taking this concept one st...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Execution of MPI applications on Clusters and Grid deployments suffers from node and network failure that motivates the use of fault tolerant MPI implementations. Two category tec...
ICS
1999
Tsinghua U.
13 years 12 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
IPPS
1996
IEEE
13 years 12 months ago
1996
IEEE
This paper presents the design and implementation of a Sliding Memory Plane (SliM) Array Processor, a mesh-connected SIMD architecture. To build the array processor, we developed ...